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Inter Partes Review
`U.S. Patent No. 10,839,789
`
`Oral Argument, March 12, 2024
`
`Apple Inc. v. Zentian Limited
`Case No. IPR2023-00036
`
`Petitioner’s Demonstrative Exhibits – Not Evidence
`
`Petitioner’s DX-1
`
`IPR2023-00036
`Apple EX1078 Page 1
`
`

`

`Claim 1 and Grounds
`
`- Ground 1: Claims 1, 10-11, 14, and 17
`- Smyth (Ex. 1005) in view of Mozer (Ex. 1046)
`
` Claim 1:
`
`Petition (Pet) (Paper 1), 4, 80
`
`Petitioner’s DX-2
`
`

`

`ICs with Processors and Memories Were
`Ubiquitous
`- Boike: Multiple DSPs
`(each including
`processor and
`memory) on a single IC
`
`- Toyoda: Acoustic Model
`Memory 43 and
`Matching Unit 42
`(“calculating
`apparatus”) both part
`of Sensor Signal
`Processor 31
`
`Pet. Reply (Paper 21), 2, citing Schmandt Dec. (Ex. 1003), ¶¶ 70-76, 168; Pet., 42-44;
`Boike (Ex. 1006), Fig. 1; Toyoda (1029), Fig. 7
`
`Petitioner’s DX-3
`
`

`

`Benefits of a Processor and Memory
`on Single IC
`- Multiple Benefits of ICs (Schmandt Dec., ¶ 76)
`
`Ozcelik (Ex. 1034), 1:47-51
`- Use of a Known Technique (Schmandt Dec., ¶ 167)
`
`“[I]f there’s a known technique to address a known problem using ‘prior art
`elements according to their established functions,’ then there is a motivation to
`combine.”
`
`Intel Corp. v. PACT XPP Schweiz AG, 61 F.4th 1373, 1380 (Fed. Cir. 2023)
`
`Schmandt Dec., ¶ 76 (citing Ozcelik, 1:47-51), ¶¶ 167, 231-232; Pet. Reply (Paper 21), 13-14
`
`Petitioner’s DX-4
`
`

`

`Dr. Anderson Admitted Known
`Advantages in the Prior Art
`
`Anderson Depo. Tr. (Ex. 1069), 79:11-14
`
`Anderson Depo. Tr. (Ex. 1069), 91:8-10
`
`Pet. Reply (Paper 21), 1-2
`
`Petitioner’s DX-5
`
`

`

`Dr. Anderson Admitted Known
`Advantages in the Prior Art
`
`Anderson Depo. Tr. (Ex. 1069), 90:23–91:10
`
`Pet. Reply (Paper 21), 1-2; PO Sur-Reply, 10
`
`Petitioner’s DX-6
`
`

`

`Smyth-Mozer Combination for Claim 1(e)
`
`Mozer’s Audio Recognition Peripheral IC 400
`
`Paper 1, 40-41; Mozer (Ex. 1046), Fig. 4 (annotated)
`
`Petitioner’s DX-7
`
`

`

`Mozer’s Stated Advantages of Audio
`Recognition Peripheral 400 on a Single IC
`
`Mozer, 9:15-21
`
`Mozer, 10:46-52
`
`Pet., 42; Schmandt Dec., ¶ 167; Pet. Reply (Paper 21), 14-15
`
`Petitioner’s DX-8
`
`

`

`The Mapped Combination Advantageously
`Avoids a CPU HOLD Signal
`
`Smyth, 6:1-4
`
`Smyth, 6:35-42
`
`State
`Probabilities
`
`Smyth, Fig. 3 (annotated)
`
`From Classifier
`
`Smyth (Ex. 1005), 6:13-15; Pet. Reply (Paper 21), 14-19
`
`Petitioner’s DX-9
`
`Smyth, Fig. 4 (annotated)
`
`

`

`Mr. Schmandt’s Opinions Regarding Use of
`a CPU HOLD Signal
`
`Schmandt Supp. Depo. Tr. (Ex. 2021), 36:2-12
`
`Pet Reply (Paper 21), 16-19; PO Sur-Reply (Paper 27), 8-9
`
`Petitioner’s DX-10
`
`

`

`Zentian’s Unclaimed
`Memory Requirements
`- Dr. Anderson Admitted Claim 1 Does Not Recite a Minimum
`Memory Size
`
`Ex. 1069,
`78:13-19
`
`- Dr. Anderson Assumed the Claims Recite Large Language Model
`
`Pet. Reply (Paper 21), 3-5; Anderson Depo. Tr. (Ex. 1069), 76:24–77:1, 78:13-19
`
`Petitioner’s DX-11
`
`Ex. 1069,
`76:24-
`77:1
`
`

`

`Smyth and the Motorola DSP56000
`
`- Zentian Admitted DSP56000 has 9K Available Memory:
`POR (Paper 19), 8-9;
`Anderson Dec. (Ex. 2020), ¶¶ 41,
`44
`- Smyth Teaches a Recognizer for Recognizing Digits (e.g., 1, 2, …)
`
`Smyth, 6:52-66; Schmandt
`Dec. (Ex. 1003), ¶ 187
`- Dr. Anderson Admitted Smyth Teaches “Abbreviated Model”
`
`Anderson Depo. Tr. (Ex. 1069),
`76:7-23
`
`Pet. Reply (Paper 21), 2-4
`
`Petitioner’s DX-12
`
`

`

`Dr. Anderson Miscalculated Memory Size
`Requirements
`- Dr. Anderson’s Incorrect Triphone
`Calculation
`
`- “tens of thousands” of allophones
`Ex. 2020, 43
`-
`- “2000 allophones” used for calculation
`- 16-40 features per vector (assume 16)
`- 128-320 bytes per state (assume 128)
`- 2000 allophones * 3 states = 6000 states
`- 6000 states * 128 bytes = 768,000 bytes
`- “more than 720 kBytes”
`- Ex. 2020, 43
`- “more than 750 kBytes”
`- POR, 9
`
`- Smyth’s Tristate Allophone
`Calculation for Large
`Language Model
`- Tristate - 3 states per allophone
`- ~50 allophones ~150 states
`- 8 MFCC per feature vector
`- 4 bytes per Real variable
`- 8 MFCC * 4 bytes = 32 bytes per
`state
`- 150 states * 32 bytes = 4,800
`bytes
`- 4,800 bytes < 9,000 bytes
`Zentian admitted for
`Motorola DSP56000’s
`memory
`
`Pet. Reply (Paper 21), 5-10; Ex. 1068, 3-6; Paper 1, 16-17; Smyth, 5:30-6:52;
`POR (Paper 19), 8-9; Anderson Depo. Tr. (Ex. 1069), 76:19–78:12; Anderson Dec. (Ex. 2020), ¶ 43
`
`Petitioner’s DX-13
`
`

`

`The Claims Do Not Require a POSITA to
`Fabricate the IC
`- Zentian’s Admissions:
`
`“Ordinary artisans in the
`field of speech recognition
`are simply consumers of
`integrated circuits
`fabricated by others….”
`
`“The claims recite a
`single IC that has already
`been fabricated; they do
`not require a POSA to
`fabricate such an IC or
`know how to do so[.]”
`
`Anderson Dec (Ex. 2020), ¶ 61;
`Paper 19, 18
`
`PO Sur Reply (Paper 27), 12
`
`- Specification silent on how to fabricate an IC
`
`- Smyth, Mozer, and Toyoda teach operable, already-fabricated ICs
`
`Pet. Reply, 22-25
`
`Petitioner’s DX-14
`
`

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